SAPS (Sundance ASIC Prototyping System) are modular system solutions for ASIC prototyping, IP core Development and Design Verification. The systems can have various numbers of Xilinx FPGAs of different types to provide a heterogeneous FPGA-based solution. Support for SAPS is provided by PARS and other well known ASIC partitioning software.

• DSP318-SX55 with Virtex-4 FPGAs
• SMT351T with Virtex-5 FPGAs and up to 1GB of memory each

Systems using a mixture of different modules are also possible.

Sundance DSP Inc. also provides memory, DAQ, Ethernet modules which can be used in conjunction with the ASIC system.

Sundance ASIC systems provide users with peace of mind so that they can concentrate on the design instead of worrying about the hardware and software. PARS enables the designer to use MATLABs Simulink environment to develop the ASIC design in minutes and partition it manually. SAPS can also be used with Certify from Synplicity and AUSPY (ASIC partitioning software).