PCIe104-RFSOC is based on the Xilinx XCZU27DR-2FFVG1517E (optional 25DR and 28DR can be used with -E or -I temperature grades). Hardware is in PCIe104 form factor and electrically adheres to its latest specification. This is a TYPE 1 Host board with only Stack Down option.  One lane of RC PCIe interfaces from the PS side is routed to Bank1 of PCIe104 connector and x8 Gen 3.0, RC PCIe from PL side is available form the other banks.

8GB of DDR4 memory with ECC is attached to PL and 8GB with ECC is connected to PS side. Micron MT40A1G16RC-062E IT:B is utilized in this design and, Dual die chips are not supported! 32GB of eMMC is used as default and this can be used for storing the firmware and/or Linux image for the PS side.

The module provides up to 8ADC and DAC channels via the Nicomatic RF connector part number 342V012F51-1610-240002.

ADC channels support 12bit 4.096GSPS with / DDC; and DAC channels can achieve 14bit 6.554GSPS with / DUC.

The 8 channel DAC outputs are single ended and go through Baluns but the 8 channel ADC Input are differential for maximum accuracy. Clocking IC for the RF channels is LMX2594.

PPS GPS signal input signal via RF IO connector with external 10MHz clock. Ref clock IN and Trigger In are also provided via the RF IO connector.


Two IO connectors in the form of Samtec LSHM connector offering IOs and transceivers from PS and PL side for user application.




  1. Main device is the Xilinx RFSoC XCZU27DR-2FFVG1517E, compatible with ZU25DR, and ZU28DR. Other temperature grade like -I are also available;
  2. PCIe104 stack-down connector, PCIe104 TYPE 1 HOST board;
  3. PCIe x8 GEN 3 Root Complex (RC) from PL part;
  4. One PCIe x1 RC interface from PS, connected to Bank 1 of PCIe104 connector;
  5. 5×2 2.54mm header connector for 100/1000Base-T interface;
  6. One SATA connector with Gen 3.0 interface;
  7. 5×2 2.54mm header with USB 3.0, HOST, interface;
  8. 5 pins 2.54mm header with USB- JTAG/UART Bridge IC FT4232HQ;
  9. Five Single Die 1024×16 DDR4 chips for PL – 72 bit bus width(total 8GBytes), default part number is MT40A1G16RC-062E IT:B, Dual die chips are not supported!
  10. Five Single Die 1024×16 DDR4 chips for PL – 72 bit bus width(total 8GBytes), default part number is MT40A1G16RC-062E IT:B, Dual die chips not supported!
  11. 16GByte of eMMC as boot and OS storage, other eMMC capacity is available as build option;
  12. RF IO connector is 342V012F51-1610-240002 from Nicomatic;
  13. Two IO connectors are: LSHM-130-06.0-L-DV-A-S-K-TR and LSHM-140-06.0-L-DV-A-S-K-TR;
  14. Eight ADC channels as differential, routed to RF IO connector, as build option may be AC or DC coupling, so on RF IO board user can create any input network;
  15. Eight DAC channels, routed to RF IO connector; output is 50 Ohm, AC coupled, single ended;
  16. Built in RFSoC ADC – 12bit 4.096GSPS with / DDC;
  17. Built in RFSoC DAC – 14bit 6.554GSPS with / DUC;
  18. PPS GPS signal input, from RF IO connector;
  19. External 10MHz clock input from GPS, from RF IO connector;
  20. User reference clock input from RF IO connector;
  21. Trigger In from RF IO connector;
  22. INA226 IC for current and voltage monitoring, flowing into FPGA, I2C connected to PL part;
  23. Eight GTY transceivers (not available on XZCU25DR) with three reference clock inputs, routed to first LSHM IO connector;
  24. One PS-GTR transceiver routed to first IO connector.
  25. 7 Differential Pairs from HP Bank 66 routed to First IO connector.
  26. I2C form PS with 1.8V level and one clock output routed to second IO connector.
  27. 22 PS-MIOs with 3.3V level, from PS part routed to Second LSHM IO connector.
  28. 12 Differential Pairs from HP bank 65 routed to Second IO connector, levels 1.8V by default, ordering option is 1.2V;
  29. Power 5V, 3.3V 1Amp each available on Second IO connector for external usage;
  30. Main clocking IC is HMC7044, can be synchronized with user reference clock;
  31. ICs for clocking DAC and ADC are LMX2594;
  32. LEDs for power good signals;
  33. Two Green user LEDs on board;
  34. Operating temperature range, -40°C to +85°C;
  35. Maximal board power consumption estimated to be 80 Watts;



  • Defense
  • Medical Imaging
  • Machine Vision
  • Stereo vision
  • Artificial Reality /Augmented Reality
  • Control
  • Instrumentation and testing
  • Software Defined Radio
  • Data capture and logging

3D model of PCIe104-RFSOC

3D model of PCIe104-RFSOC-with-heatsink

Block diagram of PCIe104 RFSOC



Component side

Solder side


  1. PCIe104-RFSOC-xxDR-T-S

where as xx can be 25, 27 and 28, T is temperature grade and it can be -E or -I and S is the Speed grade and can be 1 or 2