Polar-VPX, 3U VPX FPGA board SOSA aligned

Polar VPX is an innovative 3U VPX form-factor SOSA-aligned device that uses the Microchip PolarFire SoC FPGA, which combines a low-power FPGA with a 64-bit, Linux-capable RISC-V processor. This device offers a high level of security, performance, and efficiency for embedded systems development. Polar VPX is populated with an MPFS460T-1FCVG1152E device which has 461K logic cells, 20 high-speed transceivers, two PCIe hard blocks, 136 MSS IOs, 180 HSIO, and 288 GPIOs. The MSS IOs are connected to DDR4, eMMC, and ETH PHY Devices. The HSIO and GPIO pins are routed to backplane connectors, DDR4, and SPI flash. The MPFS460T PolarFire SoC provides abundant resources to meet the needs of complex embedded systems:

  • 4GB 32-bit wide DDR4-3200 providing memory to the MSS (MT40A1G16TB-062EIT DDR4)
  • 8GB 64-bit wide DDR4-3200 for additional FPGA memory (MT40A1G16TB-062EIT DDR4)
  • 16GB eMMC 5.1 flash storage
  • 10/100/1000 Ethernet PHY with RGMII interface

When populated with the MPFS250T-FCVG1152E device, it will have 254K logic cells, 16 high-speed transceivers, two PCIe hard blocks, 136 MSS IOs, 144 HSIOs, and 228 GPIOs. The MSS I/Os remains the same between the two devices.

The device package is FCVG1152 with speed grade -1.

The Polar VPX is one of the most feature-rich Polarfire-based VPX devices ever to be available on the market. It includes a Vita 57.4 compliant FMC+ connector making it suitable as a development or deployment platform. It also includes USB-C UART/JTAG and Harting iX industrial ethernet connectors on the board. Additionally, a robust amount of I/O is available to any compatible 3U backplanes. The Polar-VPX is SOSA-aligned for maximum interoperability with other VPX devices.

When installed in a compatible 3U chassis, the feature set is expanded even further allowing the device to access a 4 lanes of PCIe, highspeed networking via an SGMII PHY, SATA for data storage, and a robust connection to the backplane featuring a multitude of GPIO.

This board can be built with/without SOSA and/or IPMC support.

Features

  1.  PolarFire SOC FPGA from Microsemi MPFS460T-1FCVG1152 with an option
    to install an MPFS250T-1FCVG1152 with fewer resources.
  2. 4 GB of 32-bit wide DDR4 memory (MT40A1G16TB-062EIT DDR4) for the
    MSS;
  3.  8 GB of 64-bit bus DDR4 memory (MT40A1G16TB-062EIT DDR4) for the
    FPGA fabric;
  4.  128MB SPI Serial NOR FLASH connected to FPGA fabric for user application
    storage;
  5.  Programmable clocks using – SI5341A – provide flexible clocking to FPGA
    and High-Speed transceivers;
  6.  20 High-speed low-power Transceivers from 250Mbps – 12.7Gbps;
  7.  The module includes 16GByte of eMMC storage for Linux image storage and user
    applications;
  8. 4 Transceivers are routed to the backplane for PCIe;
  9. 1 Transceiver is selectable by MUX to go to the backplane SATA or to FMC+ connector;
  10.  Built-in FPGA internal oscillator for configuration and other purposes;
  11.  On board XO 25MHz ±10ppm stability over temperature, as a reference;
  12.  USB type C connector with JTAG/UART bridge interface;
  13.  Industrial iX connector ND9AS1200 for 1Gbit Ethernet connection;
  14. IPMC for SOSA compliance is provided by a SmartFusion2 FPGA (M2S010-VFG256I)
  15.  Mechanical dimensions are to OpenVPX specifications
  16.  Temperature range is 0°C to +70°C for extended temp and -30 to 85 for
    industrial grade.
  17. SOSA slot profile: SLT3-PAY-1F1F2U1TU1T1U1T-14.2.16

Note that the memory device used could be different from what is specified above due to availability.

Applications

  • Defense
  • Intelligence
  • Communications
  • Machine Learning
  • Machine automation
  • Aerospace, avionics and flight systems
  • Industrial automation and control
  • Motor control and servo drives
  • Smart vision, surveillance systems 
  • Test and measurement equipment
  • 5G infrastructure and networking gear
  • Medical and scientific instrumentation  
  • Automotive ADAS, connectivity modules
  • Machine learning inference at the edge
  • Edge Processing
  • Cryptography, cybersecurity and anti-tamper

 

 

Polar-VPX front view with

enclosure

 Polar-VPX solder side view

Polar-VPX front view with

enclosure

Polar-VPX component side view

 

Block Diagram

 

Polar VPX block diagram

 

Placement diagram: TBD

A full BSP including Buildroot Linux for the RISC V subsystem is included. Host-side Linux and Windows PCIe DMA drivers are also supplied.

 

Polar-VPX-YYYX-SOSA-IPMC

where YYY can be 250 or 460 representing MPFS250T in the FCVG1152 package or MPFS460T in the FCVG1152 package. Default is 460

where X can be E or I representing Extended or Industrial temperature grade. Default is -E

SOSA  If SOSA aligned hardware is required, otherwise leave blank

IPMC If IPMC suport is needed, otherwise leave blank

All Polar-VPXs are built with -1 speed grade components. Contact SDSP support if another speed grade is required.

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