The Solar Express 2000 (SE2000 or VerSOM-VPX) is a 3U SOSA-aligned OpenVPX PIC card for Sundance’s VerSOM modules. VerSOM is a generic SOM with AMD Versal ™ AI Edge, Prime, and Premium Gen 2 devices (The first VerSOM modules come with a Versal AI Edge Series Gen 2 device in an SSVA2112 package, XC2VE3858-2MSISSVA2112; other packages will become available over time).
The board is suitable for high-speed data processing, analysis, and AI inferencing.
This VPX board has many advanced features, including optical and RF interfaces and an FMC+ connector for additional flexibility and expandability. It comes with an AMD Artix™ FPGA, which acts as a voltage translator between the VerSOM module carrying the AMD Versal device and the FMC+ connector supporting the traditional voltages offered by FMC+ modules.
The board is designed for defense, aerospace, and research applications.
Features
The hardware will have the following features:
1. Board form factor: SOSA slot profile SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11- n (the P2 aperture can be optical, RF, or hybrid depending on the ordering option)
2. IPMC: Microchip SmartFusion2 SoC (M2S010-VFG256I) OR STM32 microcontroller – will be defined during design stage;
3. Main payload device: Located on SoM module, Versal Family includes Versal Gen 2 AI edge, Versal Gen 2 Premium, Versal Gen 2 Prime, Packages from SSVA2112 to VSVC3340;
4. GTYP, GTM resource allocation:
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- GTYP(PL) – 12(Max 20), GTYP(PS) – 4, X5IO – 152(Max 304)(SSVA2112 package);
- For Premium Gen2 – GTM2-24(56), X5IO – 224(600);
5. 16 GB eMMC for PS image and data storage (can populate up to 256GB);
6. 1GB QSPI flash for PS image and data storage;
7. TA101 Secure authentication IC connected to PS for secure boot and encryption capabilities;
8. TPM2.0 for storage of encryption keys for the PS;
9. Si5341 Clocking IC, 10 output, low jitter, configurable clocking IC provides fabric clocks and transceiver clocks;
10. FT4232 USB to UART: Provides 3 UART channels (one for the payload PS, one for payload PL, and one for the IPMC) and JTAG including FMC+, accessed via USB TYPE-C connector;
11. IPMC JTAG routed to Open VPX connector;
12. MicroSD connector for SD card;
13. Maintenance Ports, routed to IPMC and to Payload PS UART;
14. Contains Redrivers on Data, Control, Expansion Planes signals, PI3EQX16904GLZHEX – FOR Expansion planes, PI3EQX1204-CZHEX – For other planes;
15. 2x FireFly modules with 12 Tx and 12 Rx lanes to be able to build 3x 100Gb Ethernet ports;
16. There are some constant GTYP routing, that are not subject to change:
- 1x PS GTYP[00] – Routed to Data plane DPutp01;
- 1x PS GTYP[01] – Routed to Control Plane Cutp01;
- 4x PL GTYPs[00:03] – Routed to Data plane 1;
- 4x PL GTYPs[04:07] – Routed to Expansion Plane EP00-EP03 lines;
17. There are a stuff resistors for different assembly options, that route different GTYPs to different interfaces:
- For SOM devices with 12 GTYPs:
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- 4x PL GTYPs[08:11] –Can be routed to Expansion Plane EP04-EP07 lines, or to FMC+ DP[00..03] or to Optical;
- 2x PS GTYPs[02:03] – can be routed to FMC+ DP[00,01] if PL is not routed;
- For SOM devices with 20x GTYPs muxing is following:
- 4x GTYPs[16:19] dedicated to to EP04-EP07 lines;
- 4x PL GTYPs[08:11] – Can be routed to FMC_DP[00:03] or to Optical;
- 4x PL GTYPs[12:15] – Can be routed to FMC_DP[04:07] or to Optical;
- 2x PS GTYPs[02:03] – are not used.
- For Premium Gen2 series, FMC:
- 4x GTMs[16:19] dedicated to to EP04-EP07 lines;
- 8x GTMs[08:15] – Routed to FMC_DP[00:07];
- 16x GTMs[16:31] – Routed to FMC_DP[08:23];
- 12x GTMs[32:43] – Routed to Optical;
18. RF connectors from P2
19. Shunt resistors on some GPIO lines between the IPMC and the Payload have the ability to be removed depending on the assembly option;
20. Voltage and current sensing IC for 12V rail only, connected to IPMC and PAYLOAD via SM BUS, Others voltage will provide PG signal only;
21. Temperature Sensing IC connected to the IPMC via I2C;
22. Onboard power, controllable according Open VPX, via IPMC;
23. From the chassis the board requires both the 12V supply and the 3.3V AUX supplies;
24. Enclosure will be able to comply with Vita 48.2 conduction cooling requirements and Vita 48.8 air cooling requirements.
25. IPMC features:
- NVMRO – signal processed;
- IPMA, IMPB ports routed;
- JTAG routed from the Open VPX Connector to the IMPC;
- Maintenance port from the Open VPX Connector to IPMC;
- GDiscrete1, GPIO1, MASK_RESET#, VPX_SYSCON#, GA[0:4], GAP routed to IPMC;
- Early 3.3VAUX warning capable;
- Internal PG signals.
26. IPMC to PAYLOAD connections and features
- IPMC has access to PMBUS.
- Control of the SoM voltage (ON/OFF, Power Good);
- 10 GPIOs for various functions;
- Two I2C interfaces;
- One UART.
27. FMC+ VADJ voltage – ONLY 1.2V supported;
28. Maximum Power drawn TBD W from 12V Rail;
Applications
- AI inferencing
- Defense
- Medical
- Imaging
- Software Defined Radio
A complete BSP with Linux driver will be supplied.
SE2000-xx where “xx” can be any of the -n P2 connectors options shown in the table below
“-n” option | Description |
-0 | No P2 connector installed |
-4 | Direct RF to P2 backplane |
-6 | Hybrid Optical/RF to P2 Backplane |
-14 | Optical aperture for P2 backplane |
-TBD | Other options may be supported. Please contact Sundance DSP support for more information |
Early access to this board can be granted to interested customers, but the estimated delivery for prototype version will be Q3 of 2025.