Blind Signal Detection Using PCIe104-Jet and PCIe-RFSOC

Leveraging RFSoC and AI for Non-Cooperative Communication in Harsh Environments

Introduction

In the domain of signal intelligence (SIGINT), detecting and analyzing communications from non-cooperative senders presents formidable challenges. A non-cooperative sender is characterized by its intent to evade detection, often employing low signal-to-noise ratio (SNR) transmissions, unknown modulation schemes, and bursty, intermittent signaling patterns. These attributes complicate identification because the receiver lacks prior knowledge of the protocol, frequency, or modulation type, and there are no handshakes or cooperative mechanisms to facilitate synchronization.

Traditional digital signal processing (DSP) techniques, such as matched filtering or cyclostationary analysis, fall short in these scenarios. They rely on predefined models and assumptions about the signal environment, which break down in harsh conditions with multipath fading, Doppler shifts, and high noise floors. Likelihood-based methods, for instance, optimize detection by maximizing probability estimates but suffer from exponential computational complexity and sensitivity to model mismatches in low-SNR regimes. Feature-based approaches, while less complex, require manual engineering of features like higher-order cumulants, which degrade performance under noise and interference.

The modern paradigm shifts toward high-speed radio frequency (RF) analog-to-digital converters (ADCs) for direct sampling of wideband spectra, combined with artificial intelligence (AI) models like convolutional neural networks (CNNs), long short-term memory (LSTMs), and transformers. These enable blind signal detection by automatically learning discriminative features from conditioned baseband I/Q (in-phase and quadrature) data, excelling in noisy environments where traditional methods fail. This integration is crucial for applications in electronic warfare, spectrum monitoring, and unmanned systems, where real-time extraction of modulation type, symbol rate, and carrier frequency is essential for intelligence gathering.

Theoretical Framework

Drawing from recent advancements in blind modulation recognition, as explored in IEEE research on automatic modulation classification in non-cooperative scenarios, the workflow begins with signal acquisition and progresses through pre-processing, AI-driven feature extraction, modulation classification, and parameter estimation. The IEEE paper highlights the problem of blind signal modulation recognition, where receivers must identify unknown modulations without prior information, and parameter estimation, such as baud rate or phase offset, to enable demodulation.

Deep learning (DL) overcomes the limitations of traditional likelihood-based methods, which assume ideal channel models and struggle with computational overhead in noisy environments. In contrast, DL models, particularly CNNs applied to time-frequency representations like spectrograms or baseband I/Q constellations, learn robust features end-to-end, reducing reliance on expert-designed priors. For instance, in low-SNR conditions (e.g., below 0 dB), likelihood-based classifiers exhibit high error rates due to noise amplification, whereas DL approaches achieve superior accuracy by leveraging large datasets for training on diverse noise profiles.

While described as end-to-end, the models operate on conditioned baseband I/Q samples rather than raw ADC outputs. Front-end synchronization, normalization, and windowing remain necessary to ensure stable learning in blind non-cooperative scenarios. This mitigates error propagation and enhances resilience to harsh environments. The workflow involves:

  1. Signal Acquisition via wideband sampling to capture bursty transmissions.
  2. Pre-processing with digital down-conversion (DDC) and channelization to isolate signals of interest.
  3. Feature Extraction using AI to derive embeddings from I/Q data
  4. Modulation Classification to identify schemes like QPSK, 16-QAM, or OFDM.
  5. Parameter Estimation for fine-grained details like symbol timing.

Transformers further improve this by capturing long-range dependencies in bursty signals, outperforming LSTMs in dynamic scenarios.

Hardware Implementation

To realize this theoretical framework in practice, the Sundance DSP PCIe104-RFSoC and PCIe104-JET modules form a synergistic ecosystem. The PCIe104-RFSoC, powered by the AMD®  Zynq UltraScale+ RFSoC™, serves as the primary data acquisition and high-speed RF processing engine. It integrates multi-gigasamples per second (GSPS) ADCs directly on-chip, enabling direct RF sampling across wide bandwidths (up to 4 GHz) without intermediate frequency stages. This provides the “big data” volume necessary for AI training and inference, capturing raw I/Q streams from non-cooperative sources in real-time.

The seamless integration occurs via the PCIe/104 stack, where the  PCIe104-Jet acts as the PCIe root complex. The PCIe104-RFSoC operates as a PCIe/104  End Point, interfacing directly with the PCIe104-JET root complex over a Gen3 PCIe backplane (up to x8 lanes). This stack-based interconnect eliminates external cabling while providing deterministic, low-latency data transfer suitable for high-throughput RF workloads. Digitized RF samples are immediately processed within the RFSoC programmable logic using digital downconversion, filtering, and decimation. Only channelized, bandwidth-reduced complex baseband streams are transferred over PCIe to the Jetson™ module.

Given typical decimation factors (e.g., 64–256×) applied in the RFSoC DDC chain, baseband data rates are reduced from tens of gigabits per second to sub-gigabit-per-channel streams. For example, starting with a 4.096 GSPS ADC rate and a decimation of 128, the resulting 32 MSPS stream at 32 bits per I/Q sample yields approximately 1 Gbps per channel. This places aggregate throughput well within the ~8 GB/s payload capacity of a PCIe Gen3 x8 link, even when supporting multiple simultaneous channels.

The PCIe104-JET, based on NVIDIA®  Jetson Orin or Xavier modules, functions as the AI acceleration engine. Its SODIMM-mounted Jetson SoC leverages CUDA cores for parallel processing and Tensor cores for optimized DL inference, running models like CNNs or transformers on I/Q data streams. The RFSoC programmable logic performs deterministic, low-latency DSP and streams baseband I/Q frames into system memory via PCIe DMA. The Jetson consumes these buffers using pinned memory to minimize copy overhead, enabling CUDA kernels and TensorRT-optimized networks to operate on batched or sliding-window data for real-time inference. This architecture supports throughput exceeding 10 Gbps, with end-to-end latency maintainable in the sub-millisecond range for modest window sizes and optimized inference pipelines, though achievable latency depends on model complexity, batching strategy, and PCIe DMA scheduling.

Operational Advantage

The PCIe/104 form factor endows this system with exceptional ruggedness, making it ideal for deployment in harsh environments. PCIe/104 provides inherent mechanical robustness through rigid board-to-board stacking, eliminating cabled interconnects that are prone to fretting and fatigue. Conduction cooling via frame-mounted heat spreaders supports operation in sealed enclosures under high shock and vibration, making the architecture well-suited to MIL-STD-class platforms when integrated at the system level.

This combination excels at the edge by fusing RFSoC’s direct sampling with JET’s AI prowess, creating a self-contained SIGINT node. In low-SNR scenarios, such as urban clutter or jammed spectra, the system’s high dynamic range ADCs and DL resilience enable detection of faint, non-cooperative signals. For UAVs, the compact stack supports autonomous spectrum scanning; in ground units, it facilitates mobile electronic warfare without reliance on cloud infrastructure.

Conclusion

The fusion of AMD RFSoC technology in the PCIe104-RFSoC and NVIDIA Jetson AI acceleration in the PCIe104-JET establishes a complete signal intelligence chain within a unified, high-performance stack. By bridging theoretical DL advancements from IEEE research with hardware capabilities, this solution addresses blind signal detection for non-cooperative communications in harsh environments. It overcomes traditional DSP limitations through conditioned AI processing, high-speed sampling, and heterogeneous computing, paving the way for next-generation SIGINT systems.