Introduction
Modern electronic systems increasingly depend on high-speed data acquisition, signal processing, instrumentation, and real-time control. These applications often require several specialized hardware modules to work together, exchange large amounts of data, and maintain accurate timing.
PXI (PCI eXtensions for Instrumentation) was developed to provide a standardized, modular platform for these requirements. It combines commercial computer technology with a rugged hardware architecture designed for test, measurement, and automation applications. PXI Express (PXIe) extends this architecture by introducing the high-speed PCI Express interface.
Today, PXIe is used in automated test equipment, data acquisition, radar and communications testing, aerospace and defense development, and other applications that require modular instrumentation and high data throughput.
A conventional PXIe system requires a compatible chassis and backplane. These provide the electrical connections, power distribution, cooling, and timing resources needed by the installed cards. However, engineers developing an individual PXIe peripheral card do not necessarily need all the capabilities of a complete chassis throughout the development process.
The SundanceDSP PXIe-PCIe8 provides another option. It connects a 3U PXIe peripheral card to a standard PC through a PCI Express interface, allowing engineers to perform many firmware, software, and hardware development activities without first investing in a complete PXIe chassis.
This article explains the PXI and PXIe standards, their history and architecture, where they are used, and how the PXIe-PCIe8 can simplify the development of PXIe peripheral cards.
1. What Is PXI?
PXI stands for PCI eXtensions for Instrumentation. It is an open industry standard introduced in 1997 to provide a modular platform for measurement and automation systems.
The original PXI architecture combines the PCI (Peripheral Component Interconnect) computer bus with the rugged modular Eurocard mechanical packaging used by CompactPCI. It also adds instrumentation-specific electrical, mechanical, timing, and software features. [1][2]
A conventional PXI system consists of three main elements:
- PXI chassis: Houses the system controller and peripheral cards. It provides the backplane, power distribution, cooling, and interconnections between the installed modules.
- System controller: Runs the application software and manages the system. It may be an embedded controller installed in the chassis or an external computer connected to it.
- PXI peripheral cards: Individual modules that provide functions such as data acquisition, signal generation, digital input/output, switching, communications, and FPGA-based processing.
The modular architecture allows engineers to combine hardware from different manufacturers, provided the modules and chassis meet the relevant specifications and are compatible with the selected slot types.
The PXI Systems Alliance (PXISA) maintains the PXI specifications and supports interoperability across the industry.
2. From PXI to PXI Express
The introduction of PXI
Before PXI, automated test and measurement systems commonly used standalone instruments connected through interfaces such as GPIB (General Purpose Interface Bus), or specialized modular instrumentation platforms.
PXI offered a different approach. By building on the widely adopted PCI bus and CompactPCI mechanical architecture, it provided a modular instrumentation platform based on familiar computer technology.
The original PXI specification was published on August 20, 1997. It established an open architecture that allowed different manufacturers to develop compatible instrumentation modules and chassis. [1]
Why PXI Express was needed
As data acquisition and processing requirements increased, the bandwidth limitations of the original PCI bus became more significant.
The conventional 32-bit, 33 MHz PCI bus has a theoretical maximum bandwidth of approximately 132 MB/s. This bandwidth is shared among devices on the bus and is not equivalent to the dedicated, full-duplex links provided by PCI Express. [4]
PCI Express (PCIe) addressed these limitations by replacing the shared parallel bus with a high-speed serial interconnect. PCIe uses lanes, with each lane providing separate transmit and receive paths. Multiple lanes can be combined to increase bandwidth.
PXI Express adopted PCIe technology while retaining the modular architecture and instrumentation features of PXI. It introduced higher data bandwidth and additional timing and synchronization capabilities for demanding applications.
PXIe also maintains compatibility with supported legacy PXI hardware through defined slot types, including hybrid slots. A PXIe hybrid slot can accept PXIe modules and certain legacy PXI modules designed to be hybrid-slot compatible. Not every older PXI card is compatible, so the module and chassis documentation must be checked before installation. [2][3]
3. Understanding the PXIe Architecture
PXIe is based on the CompactPCI Express mechanical architecture and the PCI Express electrical interface, with additional features defined specifically for instrumentation.
A conventional PXIe system uses a chassis containing a backplane. The backplane connects the system controller and peripheral cards and provides the electrical infrastructure that allows them to operate together.
The role of the chassis and backplane
The chassis and backplane perform related but distinct functions.
PCI Express connectivity: The backplane routes PCI Express links between the system controller and peripheral slots. Depending on the system architecture, it may also provide links between devices through PCIe switches.
Power distribution: The chassis supplies power to installed cards through the backplane and associated connectors.
Mechanical support: The chassis holds the cards in their defined positions and provides the mechanical structure and connectors required by the standard.
Cooling: The chassis provides airflow and thermal management for the installed cards. This is especially important for high-performance FPGA systems and high-speed data acquisition hardware.
Timing and synchronization: The PXIe architecture defines dedicated timing and trigger resources that allow multiple cards to coordinate their operations.
Some important PXI and PXIe signals include:
- PXI_CLK10: A 10 MHz reference clock used by PXI modules for timing.
- PXIe_CLK100: A 100 MHz reference clock used by PXIe modules.
- PXIe_SYNC100: A synchronization signal associated with the PXIe 100 MHz clock architecture.
- PXI_TRIG: The PXI trigger bus, which provides trigger lines for coordinating events between modules.
- PXIe_DSTAR: Differential star-trigger signals used for timing and synchronization between the system timing resources and individual peripheral slots.
The availability and routing of these resources depend on the chassis and slot type. A complete PXIe chassis provides the infrastructure for coordinating multiple modules. The PXIe-PCIe8, by contrast, is designed for individual-card development and does not replace a chassis backplane. [2][3]
Why a PXIe card normally requires a chassis
A PXIe peripheral card is designed to connect to the mechanical and electrical interface defined by the PXIe standard. In a conventional system, the chassis backplane provides that interface.
A standard desktop PC motherboard has PCIe slots, but these do not provide the complete PXIe mechanical connection, instrumentation timing and trigger infrastructure, or the chassis power and cooling arrangement.
Consequently, connecting a PXIe peripheral card to a desktop PC is not normally as simple as inserting it into an available motherboard slot. An appropriate adapter is needed to provide the connection between the PC and the PXIe card.
4. PXIe Bandwidth and PCI Express
One of the main reasons for moving from PXI to PXIe was the need for greater data bandwidth.
The original PCI bus uses a shared parallel architecture. PCI Express uses serial lanes, and its bandwidth increases with the PCIe generation and link width.
The following table shows approximate theoretical bandwidths for common PCIe configurations.
| Interface | Configuration | Approximate bandwidth |
|---|---|---|
| Conventional PCI | 32-bit, 33 MHz | 132 MB/s shared bus |
| PCIe Gen 1 | x1 | 250 MB/s |
| PCIe Gen 1 | x4 | 1 GB/s |
| PCIe Gen 1 | x8 | 2 GB/s |
| PCIe Gen 2 | x1 | 500 MB/s |
| PCIe Gen 2 | x4 | 2 GB/s |
| PCIe Gen 2 | x8 | 4 GB/s |
| PCIe Gen 3 | x1 | Approximately 985 MB/s |
| PCIe Gen 3 | x4 | Approximately 3.94 GB/s |
| PCIe Gen 3 | x8 | Approximately 7.88 GB/s |
The PCIe figures are theoretical one-direction bandwidths after accounting for encoding overhead. Gen 1 and Gen 2 use 8b/10b encoding, while Gen 3 uses 128b/130b encoding. Actual application throughput is lower because of protocol and transaction overhead. PCIe is full-duplex, meaning data can travel in both directions simultaneously. [4][5]
The PXIe-PCIe8 provides a PCIe Gen 4 x8 connection, as shown in its published block diagram. PCIe Gen 4 doubles the per-lane signaling rate of Gen 3, providing a theoretical bandwidth of approximately 1.97 GB/s per lane in each direction after encoding overhead. An x8 Gen 4 link therefore has approximately 15.75 GB/s of theoretical bandwidth in each direction. Actual throughput depends on the connected hardware and system implementation. [5][6]
This bandwidth is particularly useful for FPGA-based instrumentation, where a card may acquire data from multiple ADC (Analog-to-Digital Converter) channels, process it in an FPGA (Field-Programmable Gate Array), and transfer large data sets to a host computer.
5. Where Is PXIe Used?
PXIe is used in applications that benefit from modular hardware, high-speed communication, and coordinated operation between multiple instruments.
High-speed data acquisition and automated testing
Data acquisition systems often need to capture multiple analog signals at high sampling rates and transfer the resulting data to a host computer or processing card.
PXIe provides a platform for combining ADC cards, DAC (Digital-to-Analog Converter) hardware, FPGA processing, memory, and host computing resources.
Manufacturers also use PXIe systems to test electronic products during development and production. A single chassis can accommodate signal generators, measurement instruments, switching modules, communication interfaces, and digital test hardware.
Radar, electronic warfare, and aerospace and defense
Radar and electronic warfare systems can involve wideband signal acquisition, digital down-conversion, channel processing, and real-time analysis.
PXIe is suitable for laboratory development and test systems that combine RF instrumentation, high-speed converters, FPGA processing, and software-based control. Aerospace and defense programs also use PXIe for testing radar, navigation, communications, and mission electronics.
Software-defined radio and communications
Software-defined radio (SDR) systems use programmable hardware and software to implement signal-processing functions.
PXIe cards can provide the high-speed data conversion and FPGA processing needed for SDR development, wireless communications research, and communications test equipment.
FPGA-based PXIe cards are a natural fit for these applications because they combine programmable processing hardware with high-speed interfaces and modular instrumentation connections.
6. The Challenge of Developing a PXIe Peripheral Card
Developing a PXIe card involves several engineering activities, depending on the design:
- FPGA hardware design and firmware development.
- PCI Express interface development.
- Host software and driver development.
- Register access and control.
- Data-transfer and throughput testing.
- ADC and DAC configuration.
- Memory interface testing.
- Timing and trigger verification.
- Hardware debugging and validation.
A conventional development setup uses a PXIe chassis with a system controller and the card under development.
This provides the complete operating environment, but it also introduces additional equipment and cost. A chassis, controller, and associated infrastructure may represent a significant investment, particularly when a team is developing only one peripheral card.
Compact PXIe chassis with only a few slots are available, but even these add equipment that may not be needed when the work is focused on developing a single card.
An engineer working on FPGA firmware or host software may not need a complete multi-slot instrumentation system for every test. Many activities can be carried out using a standard workstation, provided the required card interfaces and development connections are available.
7. SundanceDSP PXIe-PCIe8: Developing PXIe Cards Using a PC
The SundanceDSP PXIe-PCIe8 is a development adapter designed to connect a 3U PXIe peripheral card to a standard PC through a PCI Express Gen 4 x8 interface.
The cable has part number PCIEC-164-0350-EC-EM-CP. The adapter and cable are also listed in the product ordering information. [6]
Main features
SMBus interface
A pin header provides access to the System Management Bus (SMBus). This allows engineers to access and control supported features and functions of the connected PXIe peripheral card.
Slot address selection
DIP switches allow the engineer to select the slot address of the PXIe peripheral card. This address is required for JTAG (Joint Test Action Group) and SMBus communication.
PXI trigger and differential star-signal monitoring
The adapter provides test points and loops for measuring and monitoring PXI_TRIG and PXIe_DSTAR signals. These provide access for checking signal activity during development.
Trigger status LEDs
User LEDs indicate the status of PXI_TRIG[0] and PXI_TRIG[1], providing a visual indication of these trigger signals.
On-board clock sources
The adapter includes crystal oscillators for generating 100 MHz and 10 MHz PXIe clocks. These provide reference clocks for the connected peripheral card.
Power options
The PXIe-PCIe8 can be powered either by the host PCIe slot or through an external power connector using a 12 V supply. This gives engineers two options for powering the development setup. [6]
8. A Typical PXIe Development Workflow
Consider an engineering team developing a custom FPGA-based data acquisition card. The card contains high-speed ADCs, memory, and an FPGA that processes acquired data before transferring it to a host computer.
A conventional approach would be to install the card in a PXIe chassis and use the chassis controller to access the hardware.
With the PXIe-PCIe8, the team can use a standard desktop PC for many individual-card development activities.
Step 1: Hardware bring-up
The engineer connects the PXIe peripheral card to the PXIe-PCIe8 using the Samtec cable and installs the adapter in the PC’s PCIe slot.
This provides a practical setup for initial hardware checks and for establishing communication between the host and the card.
Step 2: FPGA firmware development
FPGA development can be carried out using the normal FPGA design environment on the desktop workstation.
The engineer can compile the design, configure the FPGA using the supported programming method, make changes, and repeat the development cycle without requiring a complete PXIe chassis for each iteration.
Step 3: Host software development
The desktop PC can also be used to develop the host application and the software that communicates with the peripheral card.
Engineers can work on register access, control functions, data handling, and application behavior as part of the normal development process.
Step 4: Debugging and validation
The PXIe-PCIe8 provides access to the SMBus interface, slot address selection, trigger monitoring points, and status LEDs.
These facilities can help engineers investigate communication, configuration, and signal behavior while developing the card.
Step 5: System-level integration
When the card reaches the appropriate stage of development, it can be installed in a complete PXIe chassis for system-level testing.
This is where engineers can validate operation in the intended multi-card environment, including chassis-level timing, synchronization, trigger distribution, cooling, and integration with other PXIe instruments.
9. Intended Use
The PXIe-PCIe8 is intended to simplify the development and testing of an individual 3U PXIe peripheral card. It is not a replacement for a complete PXIe chassis.
- Individual-card development: It provides a PC-based development connection for one 3U PXIe peripheral card.
- Timing and synchronization: It provides selected clock sources and trigger monitoring features, but does not provide the multi-slot synchronization or complete chassis-level timing and trigger distribution of a PXIe backplane.
- Final system validation: A complete PXIe chassis is still required when testing multiple cards together or validating the final system configuration.
- Power requirements: Check the power requirements of the card being developed. The adapter supports PCIe-slot power and an external 12 V supply option.
- Host and software requirements: Contact SundanceDSP to confirm host PC compatibility and the software requirements for the intended development setup.
Full electrical and mechanical details are available from the SundanceDSP product page and support team.
Conclusion
The PXI Express standard provides a modular platform for high-performance instrumentation, data acquisition, and signal processing. The SundanceDSP PXIe-PCIe8 makes individual-card development more accessible by connecting a 3U PXIe peripheral card to a standard desktop PC through a PCIe Gen 4 x8 interface.
For engineers developing FPGA-based PXIe hardware, this provides a practical way to carry out much of the development using existing PC equipment, before moving to a complete PXIe chassis for final system integration.
To learn more about the PXIe-PCIe8 or discuss its suitability for a particular development project, contact SundanceDSP.
Product information: https://www.sundancedsp.com/pxie-pcie8/
References
- PXI Systems Alliance, PXI Specification, Revision 1.0, August 20, 1997. The PXISA specification listing provides the published PXI and PXIe specification revisions: https://pxisa.org/Specifications/
- PXI Systems Alliance, PXI Architecture: https://pxisa.org/pxi-architecture/
- PXI Systems Alliance, PXI-5: PXI Express Hardware Specification, Revision 1.1, May 31, 2018: https://pxisa.org/wp-content/uploads/2022/08/PXI5_PXIExpressHW_r11.pdf
- National Instruments, Select the Right PC for Your PCI Express Hardware: https://www.ni.com/en/shop/select-the-right-pc-for-your-pci-express-hardware.html
- AMD, Understanding Performance of PCI Express Systems, WP350: https://docs.amd.com/v/u/en-US/wp350
- SundanceDSP, PXIe-PCIe8 Product Information, including the product photographs, cable information, and block diagram: https://www.sundancedsp.com/pxie-pcie8/