The Sundance DSP FC-CL AXI Camera-link Receiver IP is a soft AMD IP core for use with AMD Vivado Design Suite. This core formats the data coming from camera-link interface and provides the user with an 80-bit interface, which then can be processed and transmitted over different interfaces.
The AXI Camera link Receiver (AXI_CL_US_R) IP core captures data from camera link interface, and presents 80-bit parallel data in AXI-stream interface. The core supports Base, Medium, Full/Extended modes with all pixel resolution as specified in the Camera-Link specification. The core provides two Full/Extended camera-link interfaces to connect and capture images from two CL-Cameras.
Sundance DSP is a design service partner of Digikey and a member of Association for Advancing Automation.
Features
The core has following features:
• AXI Compliant
• Supports Camera link clock up to 85 MHz and higher
• Supports Base/Medium/Full and Extended modes
• Power over Camera Link (PoCL) supported (hardware depended)
• Optional second camera-link camera can be connected
IP Core Facts
| Supported Device Families | Zynq MPSoC, Ultrascale, Ultrascale+, Zynq ®-7000 All Programmable SoC 7 Series FPGAs |
| Supported User Interfaces | AXI-Lite, AXI-Stream |
| Example Design | VHDL |
| Constraints File | .XDC |
| Supported Software Drivers | Standalone and Windows 10/11 |
| Binaries | IP Core package |
FC-CL-XX
XX – can be US for IP sources that support Ultrascale or Ultrascale+ FPGA families, leave blank for IP sources that support 7000 or 7 series FPGAs
The IP core includes both sources and binaries.
